A superconducting surface-code processor with lattice-surgery logical operations

Yanzhe Wang, Fanhao Shen, Haipeng Xie, et al. · 2026 · arXiv:2606.06598

| 编号 QE325 | 主题 容错协议 | 链接 arXiv:2606.06598 |

摘要

摘要保留原文（英文）

摘要取自 arXiv / 出版方元数据，未作翻译，以保证与原文一致。

Fault-tolerant logical operations are fundamental for scalable quantum computation. Here, we report the experimental realization of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles, the logical qubits exhibit per-cycle error rates of $0.0365(2)$ and $0.0282(1)$, respectively, af

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