Addressable gate-based logical computation with quantum LDPC codes

Laura Pecorari, Francesco Paolo Guerci, Hugo Perrin, Guido Pupillo · 2025 · arXiv 2025

| 编号 QE123 | 主题 qLDPC 码 | 链接 arXiv:2511.06124 |

摘要

摘要保留原文（英文）

摘要取自 arXiv / 出版方元数据，未作翻译，以保证与原文一致。

Quantum computing relies on quantum error correction for high-fidelity logical operations, but scaling to achieve near-term quantum utility is highly resource-intensive. High-rate quantum LDPC codes can reduce error correction overhead, yet realizing high-rate fault-tolerant computation with these codes remains a central challenge. Apart of the lattice surgery approach, standard schemes for realizing logical gates have so far been restricted to performing global operations on all logical qubits at the same time. Another approach relies on low-rate code switching methods. In this work, we introduce a gate-based protocol for addressable single- and multi-qubit Clifford operations on individual

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